Planar diac

ABSTRACT

The invention concerns an asymmetric diac comprising a highly-doped substrate ( 21 ) of a first type of conductivity, a lightly-doped epitaxial layer ( 22 ) of the second type of conductivity on the upper surface of the substrate ( 21 ), a highly-doped region ( 24 ) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region ( 23 ) of the second type of conductivity more doped than the a epitaxial layer beneath the region ( 24 ) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring ( 25 ) of the second type of conductivity more doped than the epitaxial layer, outside the first region, and a wall ( 26 ) of the first type of conductivity outside said ring, joining the substrate.

[0001] The present invention aims at novel diac structures especiallyenabling easing the assembly of such components.

[0002] A conventional diac structure is shown in FIG. 1. The structureis formed from a substrate 1 of a first conductivity type, here type P.On either side of the substrate are formed heavily-doped regions of theopposite type, here, type N, respectively 2 and 3. To obtain asufficiently high breakdown voltage, the so-called mesa technology isused, which consists of etching grooves at the border between two diacsformed in a same wafer. The angle formed by the groove at the locationwhere it cuts the junction between the P and N⁺ regions is an importantparameter for determining the breakdown voltage at the componentperiphery. Another important parameter is the choice of the passivationproduct 4 formed in the grooves.

[0003] The upper and lower surfaces of the diac are covered withmetallizations M1 and M2. Conventionally, a diac is a device of smallsize, its thickness being smaller than 0.3 mm and its surface being onthe order of 0.5 mm×0.5 mm.

[0004] Special packages are thus provided for the diacs, for example,piston systems arranged on either side of a glass tube in which the chipis enclosed.

[0005] To avoid difficulties associated with the mesa technology andwith the digging of grooves, it has been attempted to make diacs ofplanar type, for example, such as that shown in FIG. 2, also formed froma P-type substrate 1. The upper and lower surfaces of the substrate arecoated with a masking layer, for example, silicon oxide, respectively 11and 12, provided with a central opening through which is formed anN⁺-type diffused region, respectively 13 and 14. These planar structuresenable obtaining satisfactory planar structures of the junctionperipheries, but pose assembly problems. Indeed, it becomes difficult toweld the chip on a metal support wafer since, in case the weldingextends laterally beyond its location, a short-circuit is createdbetween one of the N⁺ regions and the P substrate. Metallizations mustthus be provided, for example formed of silver balls 15 and 16, locatedon N⁺ regions 13 and 14, which complicates the assembly and increasesits cost.

[0006] Thus, to assemble a diac of planar type such as that of FIG. 2,very specific packages and assembly modes must be provided.

[0007]FIG. 3 illustrates the typical characteristic of a diac. Such acomponent cannot be assimilated to two head-to-tail zener diodes.Indeed, the existence, when one of the junctions is in avalanche, ofanother forward junction which injects into the substrate, causes abreakover type effect. Thus, the diac breaks down when the voltagethereacross reaches a value VBO. The voltage then drops to anintermediary voltage Vf as long as the current is in a given range ofvalues. The voltage across the diac rises back if the current comes outof this range. In the example shown in FIG. 3, the value of voltage VBOis 32 volts, the value of voltage Vf is 13 volts, the current at thebreakover time is on the order of 0.3 μA (that is, the diac has veryslight leaks), and the current corresponding to voltage Vf is in a rangeon the order of from 10 to 100 milliamperes.

[0008] A diac, such as those shown in FIGS. 1 and 2, has a symmetricalcharacteristic, as shown in FIG. 3. The value of voltage VBO essentiallydepends on the doping levels of the junctions between the N⁺ regions andthe P substrate. The value of forward voltage Vf essentially depends onthe doping level and on the thickness of substrate 1, which can beconsidered as the floating base of a transistor having its emitter andcollector corresponding to the N⁺ regions. This base must be such thatthe carriers injected by the forward junction can cross it. The carrierlifetime must thus be long in the base if its width is large, that is,it must be lightly doped. If the base dimension becomes small, thecarrier lifetime in this base must be reduced, for example by a metallicdiffusion. These various compromises determine above-mentioned voltageVf.

[0009] Generally, semiconductor manufacturers are asked to provide diacshaving well established values of VBO and Vf. For example, a diac havinga voltage VBO of 32 V±12%, with a voltage drop from VBO to Vf of aminimum 10 V, and with an asymmetry smaller than a few percents of theconsidered values, will be desired.

[0010] An object of the present invention is to form such a diac whichis easy to manufacture, that is, which is of planar type and not of mesatype, and which is easily assembled on a connection grid including abase on which a surface of the component is welded.

[0011] To achieve this object, the present invention provides anasymmetrical diac including a substrate of a first conductivity typewith a high doping level, a lightly-doped epitaxial layer of the secondconductivity type on the upper surface of the substrate, a heavily-dopedregion of the first conductivity type on the upper surface side of theepitaxial layer, a region of the second conductivity type more heavilydoped than the epitaxial layer under the region of the firstconductivity type and that does not extend beyond said layer, a channelstop ring of the second conductivity type more heavily doped than theepitaxial layer, outside of the first region, and a wall of the firstconductivity type outside of said ring, joining the substrate.

[0012] According to an embodiment of the present invention, the firstconductivity type is type N.

[0013] The present invention also provides an assembly forming asymmetrical diac including two asymmetrical diacs such as abovementioned, in antiparallel.

[0014] According to an embodiment of the present invention, the assemblyincludes a first diac welded by its rear surface to a first conductivewafer, a second diac welded by its rear surface on a second conductivelayer, the upper surface of each diac being welded to the conductivewafer supporting the other diac.

[0015] The foregoing objects, features and advantages of the presentinvention, will be discussed in detail in the following non-limitingdescription of specific embodiments in connection with the accompanyingdrawings, in which:

[0016]FIG. 1 shows a mesa-type diac structure according to prior art;

[0017]FIG. 2 shows a planar-type diac structure according to prior art;

[0018]FIG. 3 shows the current/voltage characteristic of a diac;

[0019]FIG. 4 is a simplified cross-section view of a diac structureaccording to the present invention;

[0020]FIG. 5 shows the current/voltage characteristic of a diacaccording to the present invention;

[0021]FIG. 6 illustrates the assembly diagram of a diac according to thepresent invention;

[0022]FIG. 7 shows an assembly of diacs in antiparallel according to thepresent invention; and

[0023]FIG. 8 shows a diffusion profile of an example of forming of adiac according to the present invention.

[0024] As shown in FIG. 4, the present invention provides forming a diacon a structure including a heavily-doped substrate 21 of a firstconductivity type, which will be considered hereafter as being type N. AP-type epitaxial layer 22 is formed on this substrate. A region 23 moreheavily doped than region 22 is formed in epitaxial layer 22, through afirst mask. An N-type region 24 extending on all sides beyond region 23and more heavily doped than region 23 is formed above region 23, througha second mask. Thus, a portion of P-type doped region 23 remains underN-type region 24. At the periphery of region 24, and separatelytherefrom, a P-type ring 25 is formed, which has a channel stopfunction. The component periphery is occupied by a heavily-doped N-typewall 26, which crosses epitaxial layer 22 and joins substrate 21. Wall26 is external to ring 25 and is separate therefrom. This wall is formedimmediately after epitaxial layer 22.

[0025] A metallization M1 is formed on the upper surface of N⁺ region 24and a metallization M2 is formed on the lower surface of N⁺ substrate21. Thus, a diac is obtained between metallizations M1 and M2. Channelstop region 25 has the function of avoiding for leakage currents to flowin a region located under the upper surface of epitaxial layer 22 frommetallization M1 to metallization M2 via wall 26 and substrate 21. Wall26 has the function of avoiding for the junction between substrate 21and epitaxial layer 22 to emerge on the outside of the component.

[0026] The first junction of the diac corresponds to the junctionbetween N⁺ region 24 and P region 23, and the second junction of thediac corresponds to the junction between epitaxial layer 22 andsubstrate 21. The structure of this diac enables metallization M2 to bewelded on a metal base possibly belonging to a connection grid. Indeed,even if weldings extend laterally, and up on the diac walls, they cannotcreate short-circuits since the lateral walls are uniformly of type N⁺like the layer in contact with metallization M2.

[0027] It should be noted, as illustrated in FIG. 5, that the diacaccording to the present invention has an asymmetrical characteristic.The breakdown voltage of the junction located on the upper surface sideis smaller than the breakdown voltage of the junction located on thelower surface side. This is due to the fact that P region 23, which setswith N⁺ region 24 the positive avalanche voltage (taking metallizationM2 as a reference) is more heavily doped than P epitaxial layer 22,which sets with N⁺ region 21 the negative breakdown voltage (stilltaking metallization M2 as a reference).

[0028] Such an asymmetrical diac can have advantages in some types ofapplications.

[0029] However, if a diac with a symmetrical breakdown voltage isdesired to be formed, this is perfectly possible, by assembling twodiacs according to the present invention in antiparallel, as shown inFIG. 6. This can be done by using a preexisting connection grid used fortransistors of small size including, after cutting-up, as shown in FIG.7, a base 31, and two electrode strips 32 and 33. Two diacs 35 and 36are welded by their rear surface respectively on base 31 and, forexample, on strip 33. The upper surface of diac 36 is welded by a wire37 to base 31 and the upper surface of diac 35 is welded by a wire 38 tostrip 32. By providing a short-circuit between strips 32 and 33, twohead-to-tail diacs in antiparallel are obtained between strip 31 formingthe first electrode of the assembly and short-circuit 39, whichcorresponds to the assembly of FIG. 6. Thus, a perfectly symmetricalequivalent diac is present between strip 31 and short-circuit 39,corresponding to the assembly of FIG. 6, having identical positive andnegative breakdown voltages. The embodiment of FIG. 7 is an exampleonly. Generally, a first diac welded by its rear surface to a firstconductive wafer, a second diac welded by its rear surface to a secondconductive wafer, will be provided, the upper surface of each of thediacs being welded to the conductive wafer supporting the other diac.

[0030]FIG. 8 illustrates an example of a doping profile of a diacaccording to the present invention having a characteristic such as shownin FIG. 5.

[0031] In FIG. 8, the abscissas correspond to vertical distances inmicrometers, value “0” corresponding to the upper surface of the N⁺substrate on which the P-type epitaxial layer is developed. The profileof this epitaxial layer corresponds to what is indicated by reference41. During the epitaxy, an N⁺-type region of substrate 21 diffusesaccording to the curve designated by reference 42. Curve 43 correspondsto the P-type diffusion formed from the upper surface, and curve 44corresponds to N⁺-type diffusion 24 formed from the upper surface.

[0032] The references corresponding to the various regions have beenindicated under the abscissas. Thus, N⁺-type layer 24 extends atapproximately 5 μm under the upper surface of the epitaxial layer, andP-type region 23 and P-type layer 22 extend down to substantially 12 μmfrom the epitaxial layer surface. The doping level of P-type layer 22 atthe junction with substrate 21 is approximately 2.10¹⁵ atoms/cm³ and thedoping level of P-type layer 23 at the interface with N⁺-type region 24is on the order of 8.10¹⁷ atoms/cm³.

[0033] Of course, the doping profile of FIG. 8 is an example only andthe various doping materials may be optimized according to the desireddiac characteristics.

1. An asymmetrical diac including: a substrate (21) of a firstconductivity type with a high doping level, a lightly-doped epitaxiallayer (22) of the second conductivity type on the upper surface of thesubstrate (21), a heavily-doped region (24) of the first conductivitytype on the upper surface side of the epitaxial layer, a region (23) ofthe second conductivity type more heavily doped than the epitaxial layerunder the region (24) of the first conductivity type and that does notextend beyond said layer, a channel stop ring (25) of the secondconductivity type more heavily doped than the epitaxial layer, outsideof the first region, and a wall (26) of the first conductivity typeoutside of said ring, joining the substrate.
 2. The diac of claim 1,characterized in that the first conductivity type is type N.
 3. Anassembly forming a symmetrical diac including two asymmetrical diacs ofclaim 1, in antiparallel.
 4. The assembly of claim 3, characterized inthat it includes a first diac welded by its rear surface to a firstconductive wafer, a second diac welded by its rear surface to a secondconductive layer, the upper surface of each diac being welded to theconductive wafer supporting the other diac.